Codec Architect - Platform Architecture
- Job Number: 113020363
- Santa Clara Valley, California, United States
- Posted: Sep. 15, 2017
- Weekly Hours: 40.00
In this role, you will be part of the Media IP architecture team to define, architect, design, implement and deploy models for hardware media IP including video encoder, decoder, video and display processors.
- The ideal candidate will have 5+ years in developing C-models for hardware validation. Ideally the candidate will have domain expertise in video IP including video codecs, video and image processing algorithms.
- Experience developing C/C++ bit accurate models for hardware validation
- Experience integrating IP models in large high level chip models
- Experience debugging complex models
- Experience working in a chip development environment with RTL designers and verification engineers
- Knowledge of c-modeling tools, including C/C++, SystemC and scriptinglanguages such as Perl and/or Python
- Knowledge of video coding standards including H.264, HEVC
- Knowledge of video processing algorithms is preferred
As a Codec Architect, you will be responsible for developing, integrating and maintaining software models for various video encoder, decoder and display/video processing IPs. Responsibilities will include: - Working with chip and media IP architecture teams to define, document and implement C/C++ bit-accurate and transaction level models - Working with design and verification teams to define C-model interfaces for validation and debug - Working with the SOC performance team to model memory latency and IP performance - Working with the SOC modeling team to integrate the IPs in full SOC models - Developing and maintaining architecture test cases and automated workflows to verify the correct functionality of the models
BS/BEng/MS is required