Chip Package Technologist, Platforms

Google   •  

Sunnyvale, CA

Industry: Information Services

  •  

5 - 7 years

Posted 293 days ago

This job is no longer available.

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

As a Chip Package Technologist in the chip implementation team, you will work on package development for broad chip package technologies. You will be directing all technical aspects of package design, assembly process, package materials and reliability tests. You will perform early feasibility studies using test vehicles, create specifications, and provide guidance for thermal, mechanical, electrical and package substrate design. Your job function also involves leading package design reviews, and solving all technical issues associated with package reliability, process, thermal and electrical issues.

You will also work closely with multi-functional cross-teams from different organizations, along with various vendors, in order to incorporate their inputs into package development and to successfully roll out for production.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We're always on call to keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities

  • Define multi-chip package mechanical, thermal, electrical and reliability requirements in the beginning of package development stage.
  • Establish package development engineering plan and conduct package design of experiments (DOE) using mechanical/thermal test vehicles. Finalize package design, assembly process and material specification.
  • Work with chip design team to define boundaries of chip development in terms of package DFM, electrical, thermal and reliability.
  • Drive the collaboration with multi functional internal teams, OSATs and material suppliers to deliver chip package solution for production. Establish chip package technology roadmap, aligned with chip and system product roadmap.

Qualifications

Minimumqualifications:

  • BS degree in Mechanical Engineering, Electrical Engineering, Computer Science or related field, or equivalent practical experience.
  • 5 years of experience with CPI (chip package interaction) related with packaging materials, process, thermal and package design.
  • 5 years industry experience in package development for production using chip package technologies for high pin count, high power and high speed applications.
  • 4 years of experience in heterogenous integration chip package design, thermal and mechanical reliability.


Preferredqualifications:

  • PhD in Mechanical Engineering, Material Engineering, or related field.
  • Hands on experience in package mechanical modeling for component, board level and strong understanding of advance foundry process node and its interaction with package reliability and different package technology.
  • Familiar with automotive package assembly and reliability requirements (component and board level).