BigBox Emulation / Methodology Engineer

Salary depends on experience
Posted on 03/21/18
San Diego, CA
Salary depends on experience
Posted on 03/21/18

About the team:
The growing Encore Semi SoC implementation team collaborates with our customers on design of advanced systems for wireless communication, networking, storage, and automotive using innovative new core architectures. Joining our team, you will build on a background of working with state-of-the-art semiconductor design.   
 
About the project:
System Validation and Emulation (SVE) Team is part of the central SoC digital hardware organization responsible for the overall quality of the SoC silicon. The SVE team works closely with architects, designers, verification engineers, software engineers, and customers. As a member of the SVE methodology team you will be involved in developing the methodology architectural components and contribute directly to technical aspects of the simulation acceleration using SVTB/UVM methodology (Veloce/Palladium). You will work closely with cross-functional teams such as design and CAD by leveraging domain-specific expertise, sharing, and coordinating prototyping efforts, testing and support. You will also be responsible for developing, implementing and deploying advanced emulation methodology across all chips and IP cores/blocks, development of reusable testbench platforms and environments that cut across simulation, simulation acceleration, emulation and post silicon validation.

Minimum Qualifications
• Candidates should possess experience in the build and bring up of complex SOCs on emulation platforms (Veloce/Palladium/Zebu/Custom Xilinx platforms).
• Exceptional troubleshooting skills is a must.
• Experience with ARM processors and AMBA protocols.
• Good understanding of RTL (System Verilog for design).
• Good programming (C/C++) and scripting skills (Perl, Python, TCL).
• Enabling new emulation/simxl methodologies and documenting. Understanding FPGA architecture (timing concepts, clock gating).
 
Preferred Qualifications
• Experience with UVM, DPI-C.
• Version control: Clearcase, Git/Github. Gate Level Emulation/scan dump/DFT/UPF on big boxes.
• Performance and Power estimation using emulation.
• Understanding of JTAG/CMM scripts/Trace32.
• Peripherals (DDR/USB/UFS) emulation/bringup.
• Understanding of different simulation tools/environments (Questa/VCS/Incisive).
 
Education Requirements
• Required: Bachelor's, Computer Engineering and/or Computer Science and/or Electrical Engineering
• Preferred: Master's, Computer Engineering or equivalent experience
 

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