Silicon Systems Technology Group (SST) seeks ASIC Verification Engineers to verify next generation of ASICs for new core routers, switches, and firewalls.
We are looking to hire sharp ASIC Verification Engineers with excellent communication and leadership skills.
You will be part of a fast paced team responsible for delivering high-speed ASICs for large, complex systems. You will have a significant opportunity to interact with system design teams across geographies.
Open communications, empowerment, innovation, teamwork and customer success are the foundations of the team with "pay for performance" culture. Thus, you set your own limits for learning, achievements and rewards.
You will be exposed to latest verification methodologies like UVM and enable complex feature verification suites.
- Define, architect, code, and deliver verification suites/tests for ASICs that enable faster, denser, feature-rich systems
- Write complete verification plan independently.
- Lead development of block level environment.
- Verify large ASIC blocks independently and rapidly
- 7+ years of ASIC Verification Experience
- ASIC Verification using SystemVerilog
- Experience in constrained-random verification is a strong plus
- Experience with verification methodology like OVM/VMM/UVM
- Perl/Tcl scripting is strongly preferred
- Experience verifying networking protocols such as Ethernet is desirable
- Excellent written and verbal communications skills
- Strong problem solving and ASIC debugging skills
- MSEE or BSEE is required