$80K — $100K *
Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in.
As an ASIC Design Engineer, you will be responsible for digital signal processing hardware designs, specifically data path as well as control intensive digital designs. You will work with the architects of Systems, as well as other SoC team ASIC designers and software engineers to micro-architect and implement designs specific to Digital Sensor subsystems for integration into SoC for mobile applications.
- Bachelor's degree in Science, Engineering, or related field.
- 2+ years ASIC design, verification, or related work experience.
- 5+ years of RTL design experience on-chip with custom digital logic
- Should have extensively used the ASIC RTL Synthesis, LEC, Power Extraction tools (PTPX), Primetime, RTL Linting tools and extensive usage of simulation tools.
- C/C++, System Verilog, Tcl/Perl/Python shell-scripting skills required
- Experience with ASIC ECO flow, RTL sanity tools specific to Design Rule Checking and Clock Domain Crossing checks
- Familiarity with MBIST and DFT flow
- Experience with any of HLS tools: Catapult / Cadence Stratus
- System C & Matlab
- FPGA experience is a plus
- Experience with sensor data processing is a bonus
- Gate level Simulation debug and usage of power extraction tools a plus
Valid through: 3/13/2021