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ASIC Design Engineer in San Jose, CA

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compensation:

$100K - $150K*

specialty:

Mechanical Engineering, Electrical Engineering

experience:

8 - 10 years

Job Description

Job Overview:

We are looking for a SOC Logic Design engineer to develop ARM based SOC subsystem for our next generation products. This is a unique opportunity to put your passion for cutting edge microarchitecture, logic and RTL design to work in high performance SOC interfaces manufactured on the leading-edge process nodes. The ideal candidate for this role will work in a highly dynamic, fast-paced, results-oriented environment. The ideal candidate will work with verification and architecture teams to deliver and maintain critical features for existing and future products.

Responsibilities:

  • Design of ARM based SOC subsystem along with security features.
  • Identify, evaluate, and integrate various ARM IPs like AMBA(AHB/AXI) bus matrix, Crypto cell, ETM, interrupt controller, peripherals etc.
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    Valid through: 2020-5-14

About CNEX Labs

Total Jobs:
7
Average Pay:
$122,142
Total value of jobs:
$855,000
% Masters:
100%
Learn More About CNEX Labs
* Ladders Estimates