Analog IC Design Engineer

Analog IC Design Engineer

Date: Jul 24, 2023

Location: Irvine, CA, US

Company: Skyworks

If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high performance analog semiconductors whose solutions are powering the wireless networking revolution. At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management and the freedom to make meaningful contributions in a setting that encourages creativity and out-of-the-box thinking. Our work culture values diversity, social responsibility, open communication, mutual trust and respect. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together can change the way the world communicates.

Requisition ID: 71116

Summary

Skyworks Irvine, CA design center has leading R&D and product development capabilities. Our team provides many opportunities to learn from various circuit level designs to system module level for cell phone applications. You’ll be paired with an experienced engineer to support you as an integral part of the team. Working and living in Irvine provides a wonderful lifestyle in a vibrant coastal city consistently ranked as one of the country’s safest cities!

Job Responsibilities

Circuit architecture, planning, design, simulation, verification, and production ramp support of highly integrated, high-volume ICs for high-growth, fast-paced, and competitive wireless handset market

Knowledge of RF area circuit experience a plus

Familiarity with cellular standards will be useful

Good understanding of semiconductor physics and strong circuit intuition/simulation skills utilizing Cadence is necessary

Qualifications

BSEE and 5 years’ work experience/MSEE and 3 years or PhD. MSEE preferred

Demonstrated Analog IC design experience using SOI CMOS

Proficient with Cadence tools and solid understanding of general analog circuits such as bias, bandgap, LDO, opamp, charge pump etc.

Experienced in implementing on-chip ESD protection strategies for HBM/MM/CDM on IC

Strong understanding of silicon fabrication and how it affects the device physics, device model, and circuit performance

Demonstrated experience debugging, resolving and applying techniques to mitigate analog signal noise coupling and optimum layout for performance, and die size trade off

Layout experience using Cadence flow, including LVS and DRC. Ability to work with CAD engineers and provide guidance on analog layouts

Good understanding of MIPI standard

Good communication and presentation skills

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The typical base pay range for this role across the U.S. is currently USD $85,900 - $164,600 per year. Starting base pay will depend on relevant experience and skills, training and education, business needs, market demands, the ultimate job duties and requirements, and work location. Skyworks has different base pay ranges for different work locations in the U.S. Benefits include access to healthcare benefits (including a premium-free medical plan option), a 401(k) plan and company match, an employee stock purchase plan, paid time off (including vacation, sick/wellness, parental leave), among others. Employees are eligible to participate in an incentive plan, and certain roles are also eligible for additional awards, including recognition and stock. These incentives and awards are based on individual and/or company performance.

Skyworks is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law.

Nearest Major Market: Irvine California

Nearest Secondary Market: Los Angeles

Job Segment: Electrical Engineering, Design Engineer, Telecom, Telecommunications, Network, Engineering, Technology.