$80K — $100K *
Our Solution IP group is ramping up high-performance computing (HPC) demand, therefore we are looking for an enthusiastic individual to join our Analog & Mixed-Signal Circuit Design & Methodology team. As an AMS Circuit Timing and Methodology Engineer, you will be working with an immensely creative team to deliver best quality custom circuit timing models to the place and route (P&R) team. This position requires hands on experience with static timing analysis (STA) tools and flows (NanoTime) and characterization flow (SiliconSmart) with knowledge of mixed signal circuit design principles. The responsibilities include delivering timing models, characterization of analog blocks, developing and maintaining timing constraints, evaluating and fixing timing violations, improving our STA flow, identifying design vs flow issues, working closely with cross functional teams to control quality of internal timing and solving any issues at the interface between mixed signal circuit and P&R digital hardware. This position requires strong scripting skills to automate checks and the ability to lead and train junior engineers to become experts in timing.
This is a very highly visible role as you will be working on cutting edge analog circuit design techniques & flow to ramp HPC demand while interacting directly with the Solution Group's Methodology Core Team which defined the overall timing methodology for all the Analog & Mixed-signal IP teams within Synopsys. You should be a teammate with good written and verbal social skills, and able to work with multi-functional global teams.
Valid through: 4/13/2021
$80K — $100K
4 days ago