High Level Design Compiler Optimization Engineer

Intel  •  Toronto, ON and 2 other locations

5 - 7 years experience  •  Hardware

Salary depends on experience
Posted on 12/08/17
Toronto, ON
5 - 7 years experience
Hardware
Salary depends on experience
Posted on 12/08/17

Job Description

Intel's Programmable Solutions Group PSG, helps drive the future of field-programmable gate array FPGA technology. PSG has been delivering industry-leading custom logic solutions to customers since inventing the world's first reprogrammable logic device in 1984. In order to take advantage of the many opportunities that we see in the future for FPGA's, we are looking for great engineers to join our teams. As a member of PSG's FPGA High Level Design Compiler Team you will be responsible for improving the Intel FPGA OpenCL and HLS compiler tool chains. You will be driving improvements in the compiler through multiple angles including the analysis of bottlenecks in user designs, implementation of compiler enhancements and optimizations, and comprehensive benchmarking of the end result. Performance analysis and optimization is a problem involving all levels of abstraction, so the work may involve a mix of compiler software and digital design challenges. If you are interested in solving exciting problems, diverse technical challenges, and working with great people then the FPGA HLD Compiler Team may be right for you.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internshipexperiences.

Minimum Requirements :

Bachelor's in Computer Engineering, Computer Science, ElectricalEngineering, Software Engineering or related field.

Minimum of 4+ years' of experience in: - C/C++- - Data Structures - Algorithms .

Strong verbal and written communication skills.

PreferredQualifications -

Experience with compiler optimization techniques -

Experience with digital design .

Experience in software and/or hardware performance optimization .

Job ID: JR0047594

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