This engineer will work in close collaboration with internal technology team and our design team to characterize next generation power amplifiers, generate test code, and perform wafer-level reliability test. Based on the layout and design experience, candidates will also assist technology team in DOE design and test optimization to meet new design requirements.
In this role, you will
work in close collaboration with internal technology team and our design team to characterize next generation power amplifiers, generate test code, and perform wafer-level reliability test.
The RF ATE Test Development Engineer will develop ATE test solutions, both hardware and software, used for ATE testing of RF Receivers/Transmitters/Transceiver, analog, and mixed signal ASICs devices for cellular applications.
As an EM Engineer, you will work with the circuit design team to optimize component sizes and performance for use in RF circuit blocks. You will deliver components that include compact models, and DRC clean physical designs. RFIC EM engineers also execute on isolation analysis and optimization to reduce on-chip and chip to package coupling. Other responsibilities may include the optimization of multichip carriers for RF systems, focusing on loss and isolation.
In this role, you will be responsible for
improving yield and device performance of advanced RF devices during all phase of product life cycle including process development, production ramp, and high-volume manufacturing.
The RF SiP Design Engineer will deliver Front-End Module designs in a fast-paced team environment, and is required to work closely with RF IC design engineers to optimize a design by extensive co-simulation and co-design based on RF system knowledge.