In this role, the selected candidate will be responsible for verifiying wireless baseband designs by developing testplans and verification environments and applying these to verify a broad spectrum of wireless designs.
This team is responsible for developing design corresponding test plans, architecting and developing verification environments, verification of complex designs until coverage goals are achieved dynamically or statically, and completing all required verification activities at IP, sub-system, SoC and system/architecture level to insure high quality commercial success of our products.
The Mechanical Engineer position requires a combination of skills to design, analyze, and test the electronics packaging for a wide array of products, from small handheld cards to integrated rack assemblies.
In this role, you will work closely with system, architecture and other IC disciplines to define IP development requirement, conduct and deliver custom circuit designs from concept to silicon validation.
In this role, the selected candidate will be responsible for digital design, baseband design, signal integrity analysis and simulation, integration and test, transition to manufacturing and maintaining hardware through the product cycle.
In this role, the selected candidate will be responsible for digital design and FPGA implementation of uC and USB subsystem Digital design aspects including ASIC RTL customization to port to FPGA, FPGA RTL verification and debugging, FPGA synthesis, and timing closure.
In this role, the selected candidate will participate on a project involved in the development of Asics, with emphasis in synthesis, timing closure, low power, place and route. Develop constraints, run synthesis placement, low Power checks, timing and power analysis.