Performing work related to asset management and strategic planning, including building projects from identified deficiencies, Quality Assurance checks of surveyor work, developing new approaches and tools for improving project performance.
Hands on experience with verification of state of the art memory controllers such as DDR, LPDDR, RLDRAM and QDR, and HBM. Requires strong understanding of current memory controller protocols and calibration (DDR3/4, LPDDR3/4, RLDRAM3, QDR2, QDRIV, HBM-Gen1/2), JEDEC specification, board skew and jitter modeling.
The individual will help design, develop and use simulation and/or formal based verification environments, at block, sub system and full chip FPGA level, to prove the functional correctness of FPGA SoCs.
Experience with mechanical design engineering of any of the following: consumer electronics, or small medical devices, or automotive components, or injection molding, or jigs, or tooling, or fixtures, or consumer appliances with tight tolerances will be considered.
Review standard daily data processing jobs and review and debug failures in order to identify issues and their causes. Ensure daily big data processing runs without problems. Review and ensure daily web portal is posting correctly. Issue daily reporting.
A visual interaction designer (VID) is a professional who can plan, create, and communicate beautiful, usable, and effective interface designs for mobile, web, and device interfaces. From layout, to visual branding, to motion and interactivity interactive design is collaborative and comprehensive.
Develop and execute design plans to synthesize, implement and verify Design For Test, and/or close timing on complex digital integrated circuits at the block, subsystem or device level (100K to 10M gates), which are coded in VHDL/Verilog/System Verilog.