In this role, the selected candidate will execute validation compliance test plans relating to Display and HDMI port on APU ASIC; collect, analyze compliance data and generate customer validation reports. Perform first level of debug for both silicon and setup issues.
In this role, you will be responsible for the development of methodologies, execution of validation plans, and debug of failures. Requires broad understanding of multiple system areas and requires interfaces with architecture.
As an analog validation and test engineer, you will be working as a member of the Austin location's Analog Test and Validation (ATV) team that is responsible for the analog/electrical validation and manufacturing test of Intel's next generation leading edge Server CPUs.
In this role, the candidate will be responsible for validating the Memory Execution (load/store) Unit functionality of the Atom Microprocessor, developing the verification test-bench, test plans, tests, coverage monitors/assertions and infrastructure.
The Graphics Silicon Bring-up/Validation Engineer will be responsible for many aspects of embedded GPU bring up and validation, including test planning, development, automation, execution, analysis, and reporting.