In this role, you will use a variety of methods, including wireframes, prototypes, storyboards, high-fidelity mockups and specifications to communicate design thinking to senior leadership, engineering and product partners at every phase of product development.
In this role, you will apply strategic thinking to deliver end-to-end user-centered experiences, with the creativity and judgment to translate vision into concepts and designs that illustrate simplicity despite underlying complexity or constraints.
In this role, you will be responsible for full electrical design ownership of systems and/or subsystems for future/next-gen network security platforms including, but no limited to, schematic capture, stackup design, layout guidance, layout simulations, bring-up, characterization, functional and stress testing, release to production.
In this role, the successful candidate will convert subsystems into real-world final designs for integration into final product; work in a team environment to create and engineer digital design subsystems from concept through to tape-out.
In this role, you will be responsible for
participate and lead in design of prototype and production intent engines for light duty, heavy duty and large engine clients; engine designs may be clean sheet or upgrades to meet new performance and emissions targets; develop standardized design and analytical processes.
In this role, the selected candidate will be responsible for developing custom website designs and interfaces, adhering to established standards and guidelines, provide and/or purchase on behalf of the customer, photographs and images for us in design of websites.
In this role, the selected candidate will work closely with other team members including UI Designers, Business Owners, Product Managers, Content Strategists and Development Teams to bring your designs to life.
The role involves RTL performance analysis and microbenchmarking for the DRAM memory controller IP. The engineer will work closely with the architecture, design and modeling teams working on high-performance memory controller designs. He or she will drive microbenchmarking plans at the IP level, and support performance debug at the SOC level.