Provide expertise for ultra-low power digital design for Integrated Circuit (IC) designs for medical devices by using and applying technical standards, principles, theories, concepts, and techniques; applies extensive technical expertise to a variety of technical problems of high level scope and complexity.
Design of natural gas pipelines, various natural gas equipment, pipeline interconnects, system mains, and corrosion control systems to perform similar duties, as well as, oversee the installation and maintenance of all design projects.
The Design Verification (DV) Engineer brings the experience of repeated success in building UVM verification environments to verify complex semi-custom ASIC semiconductor designs. Only serious candidates with credentials (background checks will be mandatory) need apply.
In this role, the selected candidate will act as the Project Manager or Project Engineer on multiple projects in size and complexity; manage project costs, resources and deadlines through effective planning and prioritization.
Develop technical solutions to complex problems that require the regular use of ingenuity and creativity to low-power electrical designs that support new features and new therapies for pacing, defibrillation and pain stimulation.
As a Package design engineer you will be responsible for early form factor component fit studies, die escape strategies, power delivery development and implementation, ball map creation, signal assignment, die interface co-design, and point to point routing of high speed interfaces.
In this role, the selected candidate must have a hands on experience in the Hardmacro through P&R from Netlist to GDS including timing closure and Physical verification (Proficient in Synopsys ICC, Magma Talus or Cadence FE tool set.).