In this role, the selected candidate is responsible for the entire digital design flow from RTL to GDSII, including digital and mixed-signal circuits and systems that are integrated into integrated circuits (ICs), System-on-Chip (SoC) and complete chipsets that power Qualcomms wireless device portfolio.
In this role, you will be responsible primarily for digital designs targeting Xilinx FPGAs but with some elements of analog interface and power conversion circuit design with appropriate analysis and /or CAD modeling.
In this role, the selected candidate will work closely with designers and engineers to define interface and user requirements; develop new approaches to complex interface and UX problems, and convey these designs in the form of presentations, prototypes, and design specifications.
You will be responsible for design and development of IP and SOCs. This would include direct responsibility for digital SOC and IP development including architecture, microarchitecture, RTL, CDC, LINT, synthesis, STA, and LEC. - Technical oversight of deliverables to/from the verification, analog design, physical design, and DFT teams.