In this role, the selected candidate must have experience with semiconductor process development is required in one or more of following areas: PVD, CVD, photolithography, plating, CMP, dry etch, or wet process.
In this role, the selected candidate will provide accurate information to the CAD group for the following drawings: Marketing Drawings, Manufacturing Drawings, Package Outline Drawings, Interposer Drawings, and Wire Bond Diagrams.
In this role, the selected candidate will be responsible for managing package construction analysis together with package failure analysis; providing feedback and direction to equipment suppliers for equipment improvement.
This position will provide Engineering support for wafer level packaging development and production operations. The ideal candidate for this position will have a thorough understanding of the principals involved in semiconductor wafer processing and a strong background in semiconductor electrical engineering.